國外研討會


  1. Kwang-Jow Gan*,Zheng-Jie Jiang, Cher-Shiung Tsai, Din-Yuen Chan, Jian-Syong Huang, Zhen-Kai Kao, and Wen-Kuan Yeh, “Design of NDR-Based Oscillators Suitable for the Nano-Based BiCMOS Technique”,2nd International Conference on Computational and Theoretical Nanoscience(ICCTN 2013)March 1-3, Hong Kong, 2013.
  2. Kwang-Jow Gan*,Zhen-Kai Kao, Cher-Shiung Tsai, Din-Yuen Chan, and Jian-Syong Huang, “Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit”,5th International Conference on Computer Science and Information Technology(ICCSIT 2012)December 29-30, Hong Kong, 2012.
  3. Kwang-Jow Gan*, Ping-Feng Wu, Din-Yuen Chan, Cher-Shiung Tsai, Zhen-Kai Kao, and Jian-Syong Huang, “Frequency Divider Design Using CMOS-NDR-Based Chaos Circuit” International MultiConference of Engineers and Computer Scientists 2012 (IMECS 2012), March 14-16, Hong Kong, pp. 1016-1019.
  4. K. J. Gan*, C. H. Chang, J. J. Lu, C. L. Lin, Y. K. Su, B. J. Li, and W. K. Yeh, “Growth of Carbon Nanotube Using Microwave Plasma Chemical Vapor Deposition and Its Application to Thermal Dissipation of High-Brightness Light Emitting Diode”, The 2011 International Conference of Electrical and Electronics Engineering, London, U.K., July 6-8, 2011, pp. 1439-1443.
  5. M. Y. Chen, K. J. Gan, C. L. Lin, C. R. Li, "Investigation of Thermal Dissipation of the High-Power Light Emitting Diode Using the Epoxy Combined with Nano-Scale Diamond Particles", International Conference on Materials for Advanced Technologies (ICMAT), Suntec, Singapor, Jun. 26-Jul. 1 2011, U-PO4-41.
  6. Y. H. Li, K. J. Gan and Y. H. Chen, "Method for Fast Dispersing Carbon Nanotube–epoxy Composites for LED Application", International Conference on Materials for Advanced Technologies (ICMAT), Suntec, Singapor, Jun. 26-Jul. 1 2011, H-PO2-31.
  7. Kwang-Jow Gan* , Ping-Feng Wu, Wu-Yan Shie, Cher-Shiung Tsai, Dong-Shong Liang, Cheng-Hsiung Tsai,and Wen-Kuan Yeh, “Frequency Multiplier Design Using BiCMOS-Based Multiple-Peak NDR Circuit”, 2010 IEEE International Conference on Electron Devices and Solid-State Circuits, Hong Kong, December 15-17, 2010.
  8. B.-J. Li, C.-H Chang, Y.-K. Su, K.-J. Gan, and J.-W. Hong, “Thermal Dissipation of High Brightness Light Emitting Diode by Using Multi-Walled Carbon Nanotube/SiC Composites”, 23rd International Microprocesses and Nanotechnology Conference, Fukuoka, Japan, Nov. 9-12, 2010.
  9. Kwang-Jow Gan, Kuan-Yu Chun, and Dong-Shong Liang, “Frequency Divider Design Using Λ-Type Negative Differential Resistance Circuit”, IEEE International Midwest Symposium on Circuits and Systems, Seattle, Washington, USA, Aug. 1-4, 2010, pp. 969-972.
  10. Kwang-Jow Gan, Kuan-Yu Chun, and Dong-Shong Liang, “Frequency Divider Design Using Negative Differential Resistance Circuit”, 2010 Australian Communications Theory Workshop, Canberra, Australian, Feb. 3-5, 2010.
  11. W.K. Yeh, C. C. Wang, C. W. Hsu, Y.K. Fang, S. M. We, C. C. Ou, C. L. Lin, K. J. Gan, C. J. Weng, P. Y. Chen, J. S. Yuan, and J. J. Liou, “Impact of Oxide Trap Charge on Performance of Strained Fully Depleted SOl Metal-Gate MOSFET”, 2009 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC 2009), Xian, China, Nov. 25-27, 2009, pp. 197-200.
  12. Chih-Hsiang Chang, Kwang-Jow Gan, Chun-Liang Lin, and Jeng-Jong Lu, “The Thermal Dissipation Study of Carbon Nanotubes uesd in High Power LED” 2009 International Conference on Materials for Advanced Technologies, Singapore, Jun. 28-Jul. 3, 2009, A00998-02186. (ISBN: 978-981-08-3380-0)
  13. Dong-Shong Liang, Kwang-Jow Gan,*, Jenq-Jong Lu, Cheng-Chi Tai, Cher-Shiung Tsai, Geng-Huang Lan, and Yaw-Hwang Chen, “Multiple-Valued Memory Design by Standard BiCMOS Technique”, 2009 World Congress on Computer Science and Information Engineering, Los Angeles, California, USA, Mar. 31-Apr. 2, 2009, pp.596-599. (ISBN: 978-0-7695-3507-4)
  14. Kwang-Jow Gan, Dong-Shong Liang, Cher-Shiung Tsai, Yaw-Hwang Chen, and Cheng-Chi Tai, “Frequency Divider Design Using the Combination of Transistors and Passive Devices”, 2009 13th International Symposium on Antenna Technology and AppliedElectromagnetics and the Canadian Radio Sciences Meeting, Banff conference centre, Banff, AB, Canada, February 15 - 18, 2009. (ISBN: 978-1-4244-2980-6)
  15. Dong-Shong Liang, Cheng-Chi Tai, and Kwang-Jow Gan, “Aanlysis of Frequency Divider Using Negative Differential Resistance Circuit”, 2008 The IASTED International Conference on Circuits and Systems, Kailua-Kona, Hawaii, USA, Aug 18-20, 2008, pp.93-96. (ISBN:978-0-88986-754-3)
  16. Dong-Shong Liang, Cheng-Chi Tai, Kwang-Jow Gan, Yi-Zhi Lin, “Selectively Multiple-Valued Memory Design Using Negative Differential Resistance Circuits Implemented by Standard SiGe Bi CMOS Process”, 2008 International Conference on Communications,Circuits and Systems, Xiamen China, May 25-27, 2008, pp.1208-1211. (ISBN:978-1-4244-2063-6)
  17. Dong-Shong Liang, and Kwang-Jow Gan, “New D-Type Flip-Flop Design Using Negative Differential Resistance Circuits”, 4th IEEE International Symposium onElectronic Design, Test & Applications (2008 DELTA), Hong Kong, China, January 22-25, pp. 258-261, 2008. (ISBN:1-4244-0637-4)
  18. Kwang-Jow Gan*, Dong-Shong Liang, Cher-Shiung Tsai, Chun-Ming Wen, Yi-Zhi Lin, and Te-Chia Chang, “Design of Four-Valued Memory Using Three-Peak MOS-HBT-NDR Circuits”, The Fifth IASTED International Conference on Circuits, Signals, and Systems, Banff, Alberta, Canada, July 2-4, 2007, No.573-022 (ISBN:978-0-88986-670-6)
  19. Kwang-Jow Gan*, Dong-Shong Liang, Cher-Shiung Tsai, Yi-Jhih Lin, Yaw-Hwang Chen,Te-Chia Chang, and Wein-So Wang, “Novel Multiple-Valued Memory Design by Standard SiGe Process”, 4th International Conference on Materials for Advanced Technologies (ICMAT 2007), Singapore July 1-6, 2007, pp. 46, (ISBN:978-81-904438-0-7).
  20. Dong-Shong Liang, Kwang-Jow Gan*, Cher-Shiung Tsai, Te-Chia Chang, and Yi-Jhih Lin “New Negative Differential Resistance Device Design Suitable for Standard SiGe BiCMOS Nano-Technique”, 4th International Conference on Materials for Advanced Technologies (ICMAT 2007), Singapore July 1-6, 2007, pp. 46, (ISBN: 978-81-904438-0-7).
  21. Kwang-Jow Gan*, Dong-Shong Liang, Cher-Shiung Tsai, Yaw-Hwang Chen, and Chun-Ming Wen, “Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process”,2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), Singapore Dec. 4-7, 2006, pp. 1356-1359. (ISBN:1-4244-0387-1).
  22. Dong-Shong Liang, Kwang-Jow Gan*, Cher-Shiung Tsai, and Yaw-Hwang Chen, “AND and NAND Logic Circuit Design Using NDR-Based Device Suitable for CMOS Process”, 2006 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2006), Singapore Dec. 4-7, 2006, pp. 1360-1363. (ISBN:1-4244-0387-1).
  23. Dong-Shong Liang, Yaw-Hwang Chen, Chun-Min Wen, Chun-Da Tu, Kwang-Jow Gan and Cher-Shiung Tsai, “The Design of MOS-NDR-Based Cellular Neural Network”, 2006 International Joint Conference on Neural Networks, Sheraton Vancouver Wall Centre, Vancouver, BC, Canada, July 16-21, 2006, pp.2012-2014. (ISBN:0-7803-9490-9).
  24. Dong-Shong Liang, Kwang-Jow Gan*, Chun-Da Tu, Cher-Shiung Tsai, and Yaw-Hwang Chen, “Frequency Multiplier Design Based on Multiple-Peak R-BJT-NDR Devices Fabricated by SiGe Technology”, 16th Biennial University Government IndustryMicroelectronics Symposium, San Jose State University, San Jose, CA, USA, June 25-28, 2006, pp. 239-242. (ISBN:1-4244-0268-9).
  25. Dong-Shong Liang, Yaw-Hwang Chen, Chun-Min Wen, Chun-Da Tu, Kwang-Jow Gan, and Cher-Shiung Tsai, “The Design of MOS-BJT-NDR-Based Cellular Neural Network”, 16th Biennial University Government IndustryMicroelectronics Symposium, San Jose State University, San Jose, CA, USA, June 25-28, 2006, pp. 187-188. (ISBN:1-4244-0268-9).
  26. Kwang-Jow Gan*, Dong-Shong Liang, Cher-Shiung Tsai, Yaw-Hwang Chen, and Shin-Bin Kuo, “OR and NOR Logic Circuit Design Using Negative Differential Resistance Device Fabricated by CMOS Process”, 2005 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), New World Renaissance Hotel, Hong Kong, China, Dec. 19-21, 2005, pp. 813-816. (ISBN:0-7803-9339-2).
  27. Kwang-Jow Gan*, Dong-Shong Liang, Chung-Chih Hsiao, Cher-Shiung Tsai, and Yaw-Hwang Chen, “Investigation of MOS-NDR Voltage Controlled Ring Oscillator Fabricated by CMOS Process”, 2005 IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC), New World Renaissance Hotel, Hong Kong, China, Dec. 19-21, 2005, pp. 825-827. (ISBN:0-7803-9339-2).
  28. Kwang-Jow Gan*, Dong-Shong Liang, Chung-Chih Hsiao, Shih-Yu Wang, Feng-Chang Chiang, Cher-Shiung Tsai, Yaw-Hwang Chen, Shun-Huo Kuo, and Chi-Pin Chen, “Logic Circuit Design Based on MOS-NDR Devices and Circuits Fabricated by CMOS Process”, 2005 International Workshop onSystem-on-Chip, Banff, Alberta, Canada, July 20-24, 2005, pp. 392-395. (ISBN:0-7695-2403-6).
  29. Dong-Shong Liang, Kwang-Jow Gan*, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, Feng-Chang Chiang, and Long-Xian Su, “Novel Voltage-Controlled Oscillator Design by MOS-NDR Devices and Circuits”, 2005 International Workshop onSystem-on-Chip, Banff, Alberta, Canada, July 20-24, 2005, pp. 372-375. (ISBN:0-7695-2403-6).
  30. Dong-Shong Liang, Kwang-Jow Gan*, Long-Xian Su, Chi-Pin Chen, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, Shih-Yu Wang, Shun-Huo Kuo, and Feng-Chang Chiang, “Four-Valued Memory Circuit Designed by Multiple-Peak MOS-NDR Devices and Circuits”, 2005 International Workshop onSystem-on-Chip, Banff, Alberta, Canada, July 20-24, 2005, pp. 78-81. (ISBN:0-7695-2403-6).
  31. Kwang-Jow Gan*, Dong-Shong Liang, Shih-Yu Wang, Chung-Chih Hsiao, Cher-Shiung Tsai, Yaw-Hwang Chen, and Feng-Chang Chiang, “High-Frequency Voltage-Controlled Oscillator Design by MOS-MDR Devices and Circuits”, 2005 IEEE AP-S Interational Symposium andUSNC/URSI National Radio Science Meeting, Omni Shoreham Hotel, NW, Washington, DC, USA, July 3-8, 2005, pp. 33. (ISBN:0-7803-8884-4).
  32. T. S. Wu, Y. K. Su, F. S. Juang, N. Y. Li, and K. J. Gan,“Ohmic and Schottky contacts to GaSb,”International Conference on Thin Film and Applications, Shanghai, China, pp. 15-17, April, 1991.
  33. T. S. Wu, Y. K. Su, F. S. Juang, N. Y. Li, and K. J. Gan,“Effects of TMSb/TEGa ratios on epilayer properties of GaSb grown by low pressure MOCVD, ”SPIE's International Conference on Physical Concepts for Novel Optoelectronic Device Applications, Aachen, Federal Republic of Germany. 1990.



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